Linux Kernel Packet interfaces for Transmission and Reception

Packet ingresses and egresses in the Linux Kernel are implemented for differing, and also related, objectives.

On ingress, the traditional NIC/Interrupt model is modified to incorporate “bulk” processing. I.e. if the processor has more than a WEIGHT number of packets ingressing (WEIGHT specified when struct napi_struct as specified below is created), and available to be processed by the processor, then the Kernel “Polls” (with interrupts disabled) and processes the packets in “bulk” using the New per-device API Interface (struct NAPI_STRUCT). Else interrupts are enabled, and each packet processed on a per-interrupt basis. The objective is to reduce the effects of interrupt latencies for high-traffic conditions. However there are limits placed on “Polling” in “one-shot” without “deferral” (see below) so as to avoid “hogging” the processor resources from the perspectives of other duties of the Kernel/Processor. When that limit is reached (as specified by configurable BUDGET), or when we have been polling for a set number of time (jiffies), the Kernel’s “deferred processing” SOFTIRQ mechanisms kick in (NET_TX_SOFTIRQ with “action” NET_RX_ACTION). A per-napi “Poll” function is initialized at the time of device initialization (member “poll” within struct napi_struct) to process the packets and pass them to the upper layers, and it is this function that will check the WEIGHT of the device it is processing to determine how many packets to process.

Well, Packet egresses are significantly more complex than packet ingresses, with Queue management and QOS (perhaps even packet-shaping) being implemented. “Queue Discplines” are used to implement user-specifiable QOS policies (Specifiable by the “tc” command for example). Struct Qdisc (queue discipline) is the central actor, with deferred processing implemented via NET_TX_ACTION.

I explain Linux Kernel concepts and more in my classes ( Advanced Linux Kernel Programming @UCSC-Extension, and also in other classes that I teach independently). As always, Feedback, Questions and Comments are appreciated and will be responded to.


About Anand

Anand is a veteran of Silicon Valley with development experience and patents that span Processors, Operating systems, Networking and Systems development. Anand has been working for the past few years with Service Providers and large Enterprises developing e and Training systems.


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